Apple Silicon Performance
Apple’s custom silicon has steadily expanded from the original M1 to workstation-grade chips with dozens of CPU and GPU cores. Each generation raises the performance-per-watt bar, particularly in multi-core workloads where the unified memory architecture keeps every core fed without the latency penalties of traditional discrete designs.
The chart below translates recent benchmark data into an interactive ECharts scatter plot showing how each chip generation stacks up. Single-core scores highlight per-core responsiveness, while multi-core scores capture how the architecture scales under heavy workloads.
Apple Silicon performance
ECharts scatter plot comparing Geekbench 6 single-core medians with multi-core medians across Apple Silicon generations.
The progression highlights how Apple scales core counts and cache architecture to deliver substantial jumps: M1 to M2 brought double-digit percent improvements, while the M3 and M4 families compound those gains with higher clocks and next-generation efficiency cores. Even within a generation, the jump from base chips to Pro, Max, and Ultra variants shows how Apple targets specific workloads ranging from light creative projects to demanding rendering and machine learning tasks.
That split between performance and efficiency cores is the heart of Apple’s heterogeneous design. The matrix below stacks every tier by generation, filling each cell with one square per core so you can compare how the core mix evolves from base models up through the multi-die Ultra parts.
Apple Silicon core composition by tier
Each chip is displayed as a grid of cores with performance (orange) and efficiency (blue) cores arranged within its generation (x-axis) and tier (y-axis). The grid is four cores wide, stacking additional rows as needed.
Looking purely at single-core responsiveness, each generation still squeezes out additional performance through architectural refinements and higher peak clocks. The chart below quantifies the generational percentage gain in single-core Geekbench scores.
Single-core gains vs prior generation
Geekbench 6 single-core median scores for each Apple Silicon generation. Labels show change vs the previous generation; hover to compare each chip to the original M1.
Clock speeds tell a complementary story: each generation widens the gap through architectural refinements and thermal headroom that let even the lowest-tier chips boost higher. The scatter plot below tracks the peak performance-core clock Apple ships—base, Pro, Max, and Ultra—grouped by generation so you can see how the range expands over time and how each tier compares to the original M1 baseline.
Performance-core clock speeds across Apple Silicon tiers
Each point represents the peak performance-core clock speed for an Apple Silicon tier. Generations line the x-axis so you can see how frequencies scale and where multiple tiers share the same baseline.
Transistor counts tell a similar story about Apple’s architecture bets. Each jump in logic budget reflects new GPU clusters, larger caches, extra media engines, and neural accelerators. The bar chart below stacks every M-series chip so you can see how Pro, Max, and Ultra variants expand on the base silicon.
Apple Silicon transistor counts by tier
Each square’s area scales with transistor count, arranged by generation (x-axis) and tier (y-axis). Compare how Pro, Max, and Ultra variants build on the base chip and see how every tier evolves generation over generation.